USB OTG 230-pin card-edge connector Figure 1-1: Main components of the Qseven-i.MX537 module (c) Bluetechnix 2012 Page | 5 Hardware User Manual - Qseven-i.MX537 1.2 Last change: 31 January 2013 Version 1.2 Key Features * Freescale Application Processor o MCIMX537CVV8C Rev2.1 * 1 GB DDR2-SDRAM o MEM2G16D2DABG-25I o DDR2-SDRAM Clock up to 400MHz o 4x (128Mx16, 1Gbit at 1.8V) * 2 GB NAND-Flash o MT29F16G08ABACAWP-IT:C o (16Gbit at 3.3V) * 4 MB SPI-Flash o M25PX32-VMW6E o 32Mbit at 3.3V * PMIC o o o LTC3589 & ADP2119 Energy Management Power-up sequencer * Ethernet-PHY o KSZ8041NLI * HDMI-Trasmitter o AD9889B * USB-Hub o USB2517-JZX * SD Card slot * Connectors o Qseven 230-pin card-edge connector o Auxiliary ISM connector o Auxiliary I/O connector 1.3 Applications * Tablets * Smart Mobile Devices * Human-Machine-Interface * Medical Devices * Video Conference Systems * Imaging and Consumer Multimedia * Set Top Boxes * Video Conference Applications * Portable Media Players * Industrial Applications (c)

unctional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package1 MCIMX537CVV8C 3N78C 800 MHz -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 7 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting VFPv3 * TrustZone The memory system consists of the following components: * Level 1 cache: -- Instruction (32 Kbyte) --

USB OTG 230-pin card-edge connector Figure 1-1: Main components of the Qseven-i.MX537 module (c) Bluetechnix 2012 Page | 5 Hardware User Manual - Qseven-i.MX537 1.2 Last change: 31 January 2013 Version 1.2 Key Features * Freescale Application Processor o MCIMX537CVV8C Rev2.1 * 1 GB DDR2-SDRAM o MEM2G16D2DABG-25I o DDR2-SDRAM Clock up to 400MHz o 4x (128Mx16, 1Gbit at 1.8V) * 2 GB NAND-Flash o MT29F16G08ABACAWP-IT:C o (16Gbit at 3.3V) * 4 MB SPI-Flash o M25PX32-VMW6E o 32Mbit at 3.3V * PMIC o o o LTC3589 & ADP2119 Energy Management Power-up sequencer * Ethernet-PHY o KSZ8041NLI * HDMI-Trasmitter o AD9889B * USB-Hub o USB2517-JZX * SD Card slot * Connectors o Qseven 230-pin card-edge connector o Auxiliary ISM connector o Auxiliary I/O connector 1.3 Applications * Tablets * Smart Mobile Devices * Human-Machine-Interface * Medical Devices * Video Conference Systems * Imaging and Consumer Multimedia * Set Top Boxes * Video Conference Applications * Portable Media Players * Industrial Applications (c)

Figure 1-1: Main components of the CM-i.MX53 Core Module * Depends on version - see chapter 8.1 (c) Bluetechnix 2013 Page | 5 Hardware User Manual - CM-i.MX53 1.2 Key Features * Freescale Application Processor i.MX53 o Industrial version (see chapter 8.1) MCIMX537CVV8C o * Commercial version (see chapter 8.1) MCIMX535DVV1C 1 GB DDR2-SDRAM o Industrial version (see chapter 8.1) MEM2G16D2DABG-25I DDR2-SDRAM Clock up to 400MHz 4x (128Mx16, 1Gbit at 1.8V) o * Last change: 10 April 2013 Version 2.3 Commercial version (see chapter 8.1) MEM2G16D2DABG-25 DDR2-SDRAM Clock up to 400MHz 4x (128Mx16, 1Gbit at 1.8V) 2 GB NAND-Flash o Industrial version (see chapter 8.1) MT29F16G08ABACAWP-IT:C (16Gbit at 3.3V) o Commercial version (see chapter 8.1) MT29F16G08CBABAWP:B (16Gbit at 3.3V) * 4 MB SPI-Flash o M25PX32-VMW6E o (32Mbit at 3.3V) * PMIC o o o LTC3589 & ADP2119 Energy Management Power-up sequencer * Audio Codec o SGTL5000XNAA3R2 * Ethernet-Physical o KSZ8041NLI * Connectors o 3x UART o 2x SPI o 2x I2C o C

Figure 1-1: Main components of the CM-i.MX53 Core Module * Depends on version - see chapter 8.1 (c) Bluetechnix 2013 Page | 5 Hardware User Manual - CM-i.MX53 1.2 Key Features * Freescale Application Processor i.MX53 o Industrial version (see chapter 8.1) MCIMX537CVV8C o * Commercial version (see chapter 8.1) MCIMX535DVV1C 1 GB DDR2-SDRAM o Industrial version (see chapter 8.1) MEM2G16D2DABG-25I DDR2-SDRAM Clock up to 400MHz 4x (128Mx16, 1Gbit at 1.8V) o * Last change: 10 April 2013 Version 2.3 Commercial version (see chapter 8.1) MEM2G16D2DABG-25 DDR2-SDRAM Clock up to 400MHz 4x (128Mx16, 1Gbit at 1.8V) 2 GB NAND-Flash o Industrial version (see chapter 8.1) MT29F16G08ABACAWP-IT:C (16Gbit at 3.3V) o Commercial version (see chapter 8.1) MT29F16G08CBABAWP:B (16Gbit at 3.3V) * 4 MB SPI-Flash o M25PX32-VMW6E o (32Mbit at 3.3V) * PMIC o o o LTC3589 & ADP2119 Energy Management Power-up sequencer * Audio Codec o SGTL5000XNAA3R2 * Ethernet-Physical o KSZ8041NLI * Connectors o 3x UART o 2x SPI o 2x I2C o C

9 841-MCIMX515CJM6C MCIMX515CJM6C MAPBGA527 841-MCIMX515DJM8C MCIMX515DJM8C MABGAPGE 529 i.MX53 Consumer & Industrial Multimedia 841-MCIMX534AVV8C MCIMX534AVV8C TEPBGA-2 841-MCIMX535DVV1C MCIMX535DVV1C TEPBGA-2 841-MCIMX536AVV8C MCIMX536AVV8C TEPBGA-2 841-MCIMX537CVV8C MCIMX537CVV8C TEPBGA-2 i.MX6 Automotive, Consumer, Industrial, & Infotainment 841-MCIMX6U6AVM08AB MCIMX6U6AVM08AB BGA-2240 841-MCIMX6U7CVM08AB MCIMX6U7CVM08AB MAPBGA-624 841-MCIMX6Q5EYM10AC MCIMX6Q5EYM10AC FCPBGA-624 841-MCIMX6S5EVM10AB MCIMX6S5EVM10AB MAPBGA-624 841-MCIMX6X1AVK08AB MCIMX6X1AVK08AB MAPBGA-400 841-MCIMX6X1AVO08AB MCIMX6X1AVO08AB MAPBGA-400 841-MCIMX6X1CVK08AB MCIMX6X1CVK08AB MAPBGA-400 841-MCIMX6X2AVN08AB MCIMX6X2AVN08AB MAPBGA-400 841-MCIMX6X3CVN08AB MCIMX6X3CVN08AB MAPBGA-400 841-MCIMX6X3CVO08AB MCIMX6X3CVO08AB MAPBGA-400 841-MCIMX6X4AVM08AB MCIMX6X4AVM08AB MAPBGA-529 841-MCIMX6X4CVM08AB MCIMX6X4CVM08AB MAPBGA-529 841-MCIMX6X3EVK10AB MCIMX6X3EVK10AB MAPBGA-400 841-MCIMX6X3EVN10AB MCIMX6X3EVN10AB MAPBG

MCIMX537CVV8C i.MX537 Multimedia Applications Processor The i.MX53 family of processors represents Freescale's next generation of advanced multimedia and power-efficient implementation of the ARM CortexTM-A8 core. With core processing speeds up to 800 MHz, the i.MX537 is optimized for both performance and power to meet the demands of high-end, advanced applications. Integrated display controller, 1080p HD video decode and 720p video encode, enhanced graphics and connectivity features make the i.MX537 ideal for a wide range of applications such as Human Machine Interfaces (HMI) and patient monitors which require rich user interfaces with high color displays and user interaction. Features CPU Complex 800 MHz ARM Cortex-A8 CPU 32 KB instruction and data caches Unified 256 KB L2 cache NEON SIMD media accelerator Vector floating point coprocessor Multimedia Independent OpenGL(R) ES 2.0 and OpenVGTM 1.1 hardware accelerators Multi-format HD 1080p video decoder and HD 720p video encoder hardware engine

esentative. The i.MX53 application processor is a follow-on to the i.MX51, with improved performance, power efficiency, and multimedia capabilities. 1.1 Ordering Information Table 1 provides ordering information. Table 1. Ordering Information Part Number1 MCIMX537CVV8C 1 2 Mask Set N78C Features 800 MHz, full feature set Notes Package2 -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Part numbers with a PC prefix indicate non production engineering parts. Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 4 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supp

unctional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package1 MCIMX537CVV8C 3N78C 800 MHz -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 7 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting VFPv3 * TrustZone The memory system consists of the following components: * Level 1 cache: -- Instruction (32 Kbyte) --

e device. Table 2. Revision Level to Part Marking Cross-Reference Revision Package Device Marking Mask Set MCIMX53 2.1 19 x 19 mm MCIMX534AVV8C N78C MCIMX53 2.1 19 x 19 mm MCIMX535DVV1C N78C MCIMX53 2.1 19 x 19 mm MCIMX536AVV8C N78C MCIMX53 2.1 19 x 19 mm MCIMX537CVV8C N78C MCIMX53 2.1 12 x 12 mm SCIMX538DZK1C N78C Chip Errata for the i.MX53, Rev. 6 2 Freescale Semiconductor The following table summarizes errata on the i.MX53 catergorized by module. Table 3. Summary of Silicon Errata Errata Name Solution Page No fix scheduled 8 AIPS ENGcm11136 AIPS: Unaligned access causes abort on writes to the internal registers ARM ENGcm09831 ARM: Load and Store operations on the shared device memory regions may not complete in program order No fix scheduled 9 ENGcm11132 ARM: A RAW hazard on certain CP15 registers can result in a stale register read No fix scheduled 11 ENGcm11141 ARM: ARPROT[0] is incorrectly set to indicate a USER transaction for memory accesses generated from user tablewalks No fix scheduled

unctional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package1 MCIMX537CVV8C N78C 800 MHz -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 6 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting VFPv3 * TrustZone The memory system consists of the following components: * Level 1 cache: -- Instruction (32 Kbyte) -- D

unctional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package1 MCIMX537CVV8C 3N78C 800 MHz -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 7 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting VFPv3 * TrustZone The memory system consists of the following components: * Level 1 cache: -- Instruction (32 Kbyte) --

esentative. The i.MX53 application processor is a follow-on to the i.MX51, with improved performance, power efficiency, and multimedia capabilities. 1.1 Ordering Information Table 1 provides ordering information. Table 1. Ordering Information Part Number1 MCIMX537CVV8C 1 2 Mask Set N78C Features 800 MHz, full feature set Notes Package2 -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Part numbers with a PC prefix indicate non production engineering parts. Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Target frequency of the core (including Neon, VFPv3 and L1 cache): i.MX53 Applications Processors for Industrial Products, Rev. 2 2 Freescale Semiconductor Introduction * * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting

unctional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package1 MCIMX537CVV8C N78C 800 MHz -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 5 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting VFPv3 * TrustZone The memory system consists of the following components: * Level 1 cache: -- Instruction (32 Kbyte) -- D

unctional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package1 MCIMX537CVV8C 3N78C 800 MHz -- 19 x 19 mm, 0.8 mm pitch BGA Case TEPBGA-2 Case TEPBGA-2 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 7 2 Freescale Semiconductor Introduction 1.2 Features The i.MX53 multimedia applications processor (AP) is based on the ARM Platform, which has the following features: * MMU, L1 instruction and L1 data cache * Unified L2 cache * Maximum frequency of the core (including Neon, VFPv3 and L1 cache): 800 MHz * Neon coprocessor (SIMD media processing architecture) and vector floating point (VFP-Lite) coprocessor supporting VFPv3 * TrustZone The memory system consists of the following components: * Level 1 cache: -- Instruction (32 Kbyte) --